Fourteen Major Errors Are Common In 99% Of PCBS That Are Unknown To Engineers

- Aug 04, 2018-

I. common errors in the schematic diagram


(1) the ERC reporting pin has no access signal:


A. The I/O attribute is defined for the pin when the encapsulation is created;


B. The inconsistent grid attribute is modified when creating or placing components, and the pins and wires are not connected;


C. The pin is reversed when the element is created and must be connected without the pin name end.


D. the most common reason is that no engineering documents have been established, which is the most common mistake for beginners.

2) components run out of the drawing boundary: no components are created in the center of the diagram paper of the component library.


3) the created project file network table can only be partially called into PCB: when generating netlist, it is not selected as global.


4) never use annotate when using a multi-part component that you create yourself.


2. Common errors in PCB


(1) report that the NODE was not found when the network was loaded


A. The elements in the schematic diagram use packages not available in the PCB library;


B. The elements in the schematic diagram are encapsulated with inconsistent names in the PCB library;


C. The elements in the schematic diagram use pin-number inconsistent encapsulation in the PCB library.


For example, triode: the pin number in SCH is e,b and c, while that in PCB is 1,2,3.


(2) you can't always print on a page when printing


A. PCB library was not created at the origin;


B. The elements have been moved and rotated many times, and hidden characters are found outside the PCB board boundary.

Select to display all hidden characters, shrink the PCB, and then move the characters to the edge.


(3) DRC report network is divided into several parts:


Indicates that the network is not CONNECTED, look at the report file, and look it up using select CONNECTED COPPER.


If the design is more complex, try not to use automatic wiring.

Common mistakes in PCB manufacturing process



After years of practice and exploration, zhonghua PCB is a leading manufacturer of sample and small batch circuit boards under shenzhen huaqiang jufeng group. For many years, it has been focusing on the production of multi-layer precision circuit boards.


(1) pad overlap


A. Heavy hole is caused, and the drilling is broken and damaged due to multiple drilling in one place.


B. In the multi-layer board, there are both connection disks and isolation disks in the same position.


(2) the graphic layer is not standard


A. In violation of conventional design, for example, the design of element surface is at the Bottom layer, and the design of welding surface is at the TOP layer, causing misunderstanding.


B. There is a lot of design rubbish on each layer, such as broken line, useless border, labeling, etc.


(3) unreasonable characters


A. The characters cover SMD pads, which bring inconvenience to PCB fault detection and component welding.


B. The characters are too small, which makes screen printing difficult. The characters overlap with each other and cannot be distinguished. The font is generally >40mil.


(4) setting the aperture of single-side welding disc


A. The hole diameter of the single-side welding disc shall be designed to be zero, otherwise, the coordinates of the hole at this position will appear when drilling data are generated. Special instructions should be given if the hole is drilled.


B. If the single-side welding disc needs to be drilled, but the hole diameter is not designed, the software will treat the welding disc as SMT welding plate when exporting electricity and formation data, and the inner layer will lose the isolation plate.


(5) draw the welding plate with the filling block


In this way, although DRC can be passed, the welding resistance data cannot be generated directly during processing, and the welding plate can not be welded with the welding resistance agent.


(6) the electrical formation is designed with both heat dissipation disc and signal line, as well as positive and negative images together, and errors occur.


(7) large area grid spacing is too small


The spacing of grid lines is <0.3mm. In the manufacturing process of PCB, the graphic transfer process generates broken film after developing, which increases the difficulty of processing.

(8) the graph is too close to the outer frame


The spacing should be at least 0.2mm (above 0.35mm at the v-cut), otherwise the copper foil will become warped and the solder resistance will fall off during external processing, which will affect the appearance quality (including the copper skin in the inner layer of the multi-layer plate).


(9) the shape and border design is not clear


Many layers are designed with borders that do not overlap, making it difficult for PCB manufacturers to determine which line to shape. The standard border should be designed in the mechanical layer or BOARD layer, and the internal hollowing part should be clear.


(10) uneven graphic design


As a result of graphic plating, the current distribution is uneven, affecting the coating uniformity, and even causing warping.


(11) shaped hole short


The length/width of the abnormal hole shall be >2:1, and the width shall be >1.0mm, otherwise the nc drilling machine cannot be processed.


(12) undesigned milling profile positioning hole


If possible, at least 2 positioning holes with >1.5mm diameter shall be designed in the PCB board.


(13) the hole diameter is not clearly marked


A. The hole diameter should be marked as metric as possible and increased by 0.05.


B. Merge the possible combined aperture into a reservoir area as far as possible.


C. Whether the tolerance of metallized holes and special holes (such as pressure holes) is clearly marked.


(14) the inner lining of multilayer board is not reasonable


A. Put the heat dissipation welding plate on the isolation belt, and it is easy to fail to connect after drilling.


B. The design of the isolation belt is flawed and easy to be misunderstood.


C. The design of the isolation zone is too narrow to accurately judge the network