How PCB Layout?

- Aug 06, 2018-

Sot-23 and SOIC packages


Figure 6.

Standard lead packages (such as SOIC and sot-23 packages) are commonly used in low-power motor drives (figure 6).

In order to improve the power consumption of lead packaging, MPS adopts the structure of "flip chip lead frame" (figure 7).Without the use of the soldering wire, the chip is bonded to the metal lead using copper bumps and soldering materials, which can transfer heat from the chip to the PCB through the lead wire.


The structure of the lead frame of the flip chip can improve the power consumption of the lead package.

The thermal performance can be optimized by connecting the larger copper area to the lead line carrying the larger current.On the motor drive IC, the power supply, grounding and output pins are normally connected to the copper area.

Figure 8 shows the typical PCB layout of the SOIC package of "flip chip lead frame".Pin 2 is the device power pin.Please note that the copper area is located near the top layer of the device and connected to the copper layer on the back of the PCB by several hot holes.Pin 4 is the ground pin and is connected to the ground copper clad area of the surface layer.Pin 3 (device output) is also routed to larger copper areas.


Figure 8: flip chip SOIC PCB layout


Please note that there is no hot air welding disc on SMT plate.They are firmly attached to the copper area.This is essential to achieve good thermal performance.


QFN and TSSOP packages

TSSOP is packaged as a rectangle with two rows of pins.The TSSOP package of motor driver IC is usually equipped with a large exposed plate at the bottom of the package to eliminate heat from the device (figure 9).


Figure 9.

TSSOP packages usually have a large exposed plate at the bottom to eliminate heat.

QFN package is a lead-free package with a plate around the outer edge of the device and a larger plate in the center of the device bottom (figure 10).The larger plate is used to absorb heat from the chip.


To remove heat from these packages, the exposed plate must be well welded.Exposed plate is usually ground potential, so PCB can be connected to the ground.

Ideally, the heat through hole is located directly in the plate area.In the example of TSSOP encapsulation in figure 11, an 18-hole array with a bore diameter of 0.38 mm is used.The calculation of the hole array thermal resistance of about 7.7 ° C/W.


Figure 11: a TSSOP package PCB layout using an 18 heat through hole array is adopted

Usually, these holes use a diameter of 0.4mm and smaller holes to prevent tin seepage.If the SMT process requires a smaller aperture, the number of holes should be increased to keep overall thermal resistance as low as possible.

In addition to the through-hole located in the board area, the outside area of the IC main body is also provided with heat through-hole.In the TSSOP package, the copper area can extend beyond the end of the package, providing another way for the heat in the device to pass through the top copper layer.

The plates around the edge of the QFN device package avoid the use of a copper layer on the top to absorb heat.Heat must be dissipated to the inner layer or to the bottom of the PCB using a heat vent hole.


Figure 12: the PCB layout is encapsulated by QFN with 9 heat through holes

The PCB layout in figure 12 shows a small QFN (4 x 4 mm) device.In the exposed area, only nine heat through-holes are contained.Therefore, the thermal performance of the PCB is not as good as the TSSOP package shown in figure 11.


Flip chip QFN package

The flip chip QFN (FCQFN) package is similar to the conventional QFN package, but the flip chip is directly connected to the board at the bottom of the device, instead of connecting to the package board using the fuse.These panels can be placed on the opposite side of the heating power device on the chip, so they are usually arranged in long strips rather than small plates (figure 13).


Figure 13

On the surface of the chip, these packages use multiple rows of copper convex points glued to the lead frame (figure 14).


Figure 14: FCQFN is encapsulated on the surface of the chip using multiple rows of copper convex points glued to the lead frame

Small through-hole can be placed in the board area, similar to the conventional QFN package.On multi-layer plates with power supply and ground connection, these plates can be connected directly to each layer through holes.In other cases, the copper area must be connected directly to the plate in order to draw heat from the IC into the larger copper area.

Figure 15 shows the PCB layout of MPS power level IC- MP6540 product.The device has a longer power supply and a floor, as well as three output outlets.Note that the package is only 4 x 4 mm in size.

To sum up, in order to implement a successful PCB design using motor drive IC, the PCB must be carefully laid out.Therefore, this paper provides some practical Suggestions to help PCB designers achieve good electrical and thermal performance of PCB boards.