Electronic knowledge: a detailed explanation of CPU packaging technology

- Aug 18, 2018-

The so-called "CPU encapsulation technology" is a kind of technology to package integrated circuits with insulating plastic or ceramic materials.Taking the CPU as an example, the actual size and appearance we see is not the size and appearance of the actual CPU kernel, but the packaged products of components such as the CPU kernel.CPU encapsulation is necessary and critical for chips.Because the chip must be isolated from the outside world to prevent impurities in the air from corroding the chip's circuits and causing a decline in electrical performance.On the other hand, packaged chips are also easier to install and transport.Because packaging technology also directly affects the performance of the chip itself and the design and manufacture of the PCB (printed circuit board) connected with it, it is of vital importance.Packaging also refers to the installation of semiconductor integrated circuit chips with shell, it not only plays a put, fixed, sealing, protection chip and enhance the effect of heat conduction performance, but also the communication bridge of the internal and external circuit, chip on the contacts with wire is connected to the encapsulation shell on the pins of the pins and wires on the printed circuit boards and other devices connected.Therefore, for many IC products, encapsulation technology is a very critical link.

At present, the CPU package is mostly packed with insulating plastic or ceramic materials, which can seal and improve the electrical and thermal performance of the chip.As the internal frequency of the processor chip is higher and higher, the function is more and more strong, the number of pins is more and more, and the shape of the package is changing constantly.Main considerations in packaging:The ratio of chip area to encapsulation area is to improve packaging efficiency, which is close to 1:1 as far as possibleThe pins should be as short as possible to reduce delay and the distance between the pins should be as far as possible to ensure non-interference and improve performanceBased on the requirement of heat dissipation, the thinner the package, the betterAs an important part of the computer, the performance of CPU directly affects the overall performance of the computer.The last and most critical step of the CPU manufacturing process is the CPU packaging technology. There is a big gap in performance between cpus adopting different packaging technologies.Only high quality packaging technology can produce perfect CPU products.

Packaging technology of CPU chip:DIP encapsulationDIP packaging (dualin-linepackage), also known as dual-in-line packaging technology, refers to the use of dual-in-line packaging integrated circuit chips, the vast majority of small and medium-sized integrated circuits are used in this form of packaging, the number of pins generally not more than 100.The DIP packaged CPU chip has two rows of pins that need to be inserted into the chip socket with the DIP structure.Of course, it can be directly inserted in the same number of holes and geometric arrangement of the circuit board for welding.DIP - encapsulated chips should be especially careful when plugged and unplugged from the chip socket to avoid damaging the pins.DIP packaging structures include: DIP with multi-layer ceramics, DIP with single-layer ceramics, DIP with lead frame (including glass ceramic seal, plastic seal structure, ceramic low-melting glass seal), etc.

The DIP package has the following features:1. Suitable for perforating and welding on PCB(printed circuit board), easy to operate. 2. The ratio between chip area and package area is large, so the volume is also large. The earliest cpus such as 4004, 8008, 8086 and 8088 were all equipped with DIP packaging, which could be inserted into the slots on the motherboard or welded on the motherboard through two rows of pins. QFP encapsulationThe Chinese meaning of this technology is the square flat packaging technology (PlasticQuadFlatPockage), which realizes the CPU chip pins with small distance between each other and small pipe pin. Generally, large-scale or ultra-large integrated circuits adopt such packaging form, and the number of pins is generally over 100.