Despite all the controversy surrounding the value, definition, variability and technology of manufacturability design (DFM), all issues are based on chips.Of course, chip DFM is a key requirement when we start thinking about 45 and 32 nanometer designs.The focus on chip DFM, however, ignores the more important technical need: DFM for printed circuit boards.
We all know that even if the silicon chip is 100 percent perfect, the target system may still not work properly if any component (such as the package, connector, or circuit board) that the chip communicates with the chip is damaged.Many packaging, connector and PCB vendors may be pressured by system designers to control their processing tolerances.
However, unless all vendors agree to strengthen the specification, for example, a system with a plus or minus 5% tolerance for a connector with a plus or minus 10% tolerance for a PCB may not be effective.In order to optimize system design, designers need to study the causal relationship of each component.So far, we don't have DFM tools to deal with design issues like this.
In the pre-layout phase, high-speed systems or signal integrity engineers can usually only do limited Spice simulations.In order to ensure the normal operation of the system, it is necessary to simulate the boundary conditions which can cover all the machining tolerances.
For example, changes in metal wire width in PCB, dielectric stack height, dielectric constant and loss tangents all affect impedance and attenuation.However, it is only possible for engineers in larger companies to have the resources to customize their own scripts, run thousands of simulations, and then process the results.Even so, the criteria for which variables are scanned are not defined.
The most obvious lack is the boundary model of encapsulation and connectors.For high-speed design, these models can only be defined precisely by the frequency-related S parameter.However, few vendors provide good s-parameter models, let alone boundary models in a wide range of frequencies.
In the latter stage of layout validation, accurate extraction and simulation of complex PCB is required to calculate detailed corner and bend.But few tools are available.
Clearly, a common PCB design and validation approach is required.So what do we need?
Let's focus on two areas.For the pre-layout design, for example, it is best to have a gui-driven line map input editor, which enables the designer to easily input changes to each component, simulate and process the results, and report the generation and impact of each variable.
After verification, the DFM tool needs to be able to automatically adjust the layout to cover the boundary conditions. The fast full-wave extractor is used to extract parasitic parameters, and the I/O transistor boundary model is used in the circuit simulation.
It is only when the designer considers work differences in both design and validation that they are able to say that they have made a manufacturable design.Only when tool vendors realize that chips are only part of subsystems, such as PCB, can DFM finally be truly relevant to the customers developing the end product.