Design guidelines for PCB hybrid signal boards

- Sep 22, 2018-

Analog circuits operate on continuously varying currents and voltages.The work of the digital circuit depends on the detection of high or low levels at the receiving end according to the pre-defined voltage level or threshold, which is equivalent to the judgment of "true" or "false" of the logical state.There is a "grey" area between the high and low levels of the digital circuit, where the digital circuit sometimes exhibits an analog effect, such as when jumping from low level to high level (state). If the digital signal jumps fast enough, overshoot and boll reflex will occur.

For modern plate design, the concept of hybrid signal PCB is relatively vague, because even in purely "digital" devices, analog circuits and analog effects still exist.Therefore, in the early stage of design, simulation effect must be carried out in order to reliably realize strict time series allocation.In fact, in addition to the reliability that communication products must be fault-free and work continuously for several years, simulation effects are particularly needed in mass-produced low-cost/high-performance consumer products.

Another difficulty in modern hybrid PCB design is the increasing number of devices with different digital logic, such as GTL, LVTTL, LVCMOS and LVDS logic. Each logic circuit has different logic threshold and voltage swing. However, these different logic threshold and voltage swing circuits must be designed together on a PCB.Here, you can master successful strategies and techniques by thoroughly analyzing the layout and wiring design of high-density, high-performance, mixed-signal PCB.

Hybrid signal circuit wiring base

When digital and analog circuits share the same components on the same board card, the layout and wiring of the circuit must pay attention to the method.The matrix shown in figure 1 is helpful to the design and planning of the mixed signal PCB.Only by revealing the characteristics of digital and analog circuits can the desired PCB design objectives be achieved in actual layout and wiring.

In mixed-signal PCB design, there are special requirements for power supply routing and require analog and digital circuit noise to be isolated from each other to avoid noise coupling, which increases the complexity of layout and wiring.The special requirements for power supply transmission lines and the requirement to isolate the noise coupling between analog and digital circuits further increase the complexity of the layout and wiring of hybrid signal PCB.

If the power supply of an analog amplifier in A/D converter is connected to the digital power supply of A/D converter, the interaction between the analog and digital parts of the circuit is likely to occur.Perhaps, because of the location of the input/output connector, the layout scheme must mix the wiring of the digital and analog circuits.

Before laying out and wiring, the engineer needs to figure out the basic weaknesses of the layout and wiring solution.Most engineers tend to use layout and wiring information to identify potential electrical effects, even if false judgments exist.

Modern hybrid signal PCB layout and wiring

The hybrid signal PCB layout and wiring techniques will be described below through the OC48 interface card design.OC48 stands for optical carrier standard 48, which is basically for 2.5gb serial optical communication. It is a kind of high capacity optical communication standard in modern communication equipment.The OC48 interface card contains the layout and wiring problems of several typical mixed signal PCB, and its layout and wiring process will indicate the sequence and steps to solve the mixed signal PCB layout scheme.

The OC48 card contains an optical transceiver for bidirectional conversion of optical and analog electrical signals.Analog signal input or output digital signal processor (DSP) converts these analog signals into digital logic levels that can be connected to microprocessors, programmable gate arrays, and system interface circuits of DSP and microprocessors on OC48 CARDS.Separate phase-locked loops, power filters, and local reference voltage sources are also integrated.

Among them, the microprocessor is a multi-power device, the main power supply is 2V, and the I/O signal power of 3.3v is Shared by other digital devices on the board.Independent digital clock source provides clock for OC48 I/O, microprocessor and system I/O.

After checking the layout and wiring requirements of different functional circuit blocks, it is recommended to adopt 12 layers, as shown in figure 3.Microstrip and stripline configurations can safely reduce coupling of adjacent stripline layers and improve impedance control.A ground layer is set between the first and second layers to isolate sensitive analog reference sources, CPU cores, and PLL filter power supplies from the microprocessors and DSP devices in the first layer.The power supply and the ground layer are always paired, as is done on the OC48 card for the Shared 3.3v power layer.This reduces the impedance between the power supply and the ground, thus reducing the noise on the power signal.

Avoid digital clock lines and high frequency analog signal lines near the power layer, otherwise the noise of the power signal will be coupled to sensitive analog signals.

Shape and simplify the process.Due to the high current resistance of the 1-ounce copper clad plate, the 3.3v power supply layer and the corresponding ground layer shall use 1-ounce copper clad plate, while the other layer can use 0.5-ounce copper clad plate, which can reduce the voltage fluctuation caused by the transient high current or the peak period.

If you design a complex system from the ground up, use CARDS 0.093 "and 0.100" thick to support the wiring layer and the earth isolation layer.The card thickness must also be adjusted according to the routing characteristic dimensions of the perforated pad and hole so that the diameter of the hole and the width/height ratio of the finished card thickness do not exceed the width/height ratio of the metallized hole provided by the manufacturer.

If you are designing a low-cost, high-volume commercial product with a minimum number of layers of wiring, carefully consider the wiring details of all special power supplies on the hybrid signal PCB before laying out or wiring.Have the target manufacturer review the preliminary layering plan before starting the layout and wiring.Basically, the product should be stratified according to thickness, number of layers, weight of copper, impedance (tolerance) and minimum dimensions of the overhole pad and hole, and the manufacturer should provide recommendations for stratification in writing.

It is recommended to include all configuration instances of controlled impedance striplines and microstrip lines.Consider the combination of your impedance predictions with the manufacturer's impedance predictions, and then use these impedance predictions to verify the signal routing characteristics in the simulation tools used to develop the CAD wiring rules.

The OC48 card layout

High-speed analog signals between optical transceivers and DSP are very sensitive to external noise.Similarly, all special power supply and reference voltage circuits also result in considerable coupling between the card's analog and digital power transmission circuits.Sometimes, limited by the shape of the housing, the design of high density board card.The position of the external optical cable access card is fixed to a great extent due to the high position of the external optical transceiver and the high size of some components of the optical transceiver.The system I/O connector location and signal allocation are also fixed.This is the basic work that must be done before the layout.

As with most successful high-density analog layouts and wiring schemes, the layout must meet the wiring requirements, and the layout and wiring requirements must be balanced.A "layout before wiring" approach is not recommended for the analog portion of a mixed-signal PCB and the local CPU kernel at 2V operating voltage.For the OC48 card, the part of the DSP analog circuit that contains analog reference voltage and analog power by-pass capacitance should be first interactively wired.After the wiring is completed, the entire DSP with analog elements and wiring should be placed close enough to the optical transceiver to fully ensure that the high-speed analog difference signal to DSP has the shortest routing length, the least bending and the least through-hole.The symmetry of difference layout and wiring will reduce the impact of common mode noise.However, it is difficult to predict the optimal layout before wiring.

Consult the chip distributor for the PCB layout guide.Communicate fully with the application engineer of the distributor before following the guide design.Many chip distributors have strict time limits for providing high-quality fabric board recommendations.Sometimes the solution they offer is feasible for "tier one customers" who use the device.In the field of signal integrity (SI) design, the signal integrity design of new devices is particularly important.Depending on the distributor's basic guidelines and in conjunction with the specific requirements for each power and ground pin in the package, the OC48 card layout with an integrated DSP and microprocessor can be started.

After the location and wiring of the high frequency analog part is determined, the remaining digital circuits can be placed according to the grouping method shown in the block diagram.The following circuits should be carefully designed: the PLL power filter circuit position in CPU with high sensitivity to analog signals;Local CPU kernel voltage regulator;Reference voltage circuit for "digital" microprocessor.

Electrical and manufacturing specifications for digital wiring are then properly applied to the design.The aforementioned signal integrity design of high-speed digital bus and clock signal reveals some special wiring topology requirements for delay matching of processor bus, balance Ts and some clock signal wiring.But you may not know it, but there are also proposals for an update, which would add a number of terminal resistors.

In the process of solving the problem, it is natural for the board stage to make some adjustments.However, before starting wiring, an important step is to verify the sequence of the digital parts according to the layout scheme.At this point, a complete DFM/DFT layout review of the board card will help ensure that the card meets customer needs.

Digital wiring for OC48 CARDS

For the digital part of the digital device power cord and the mixed signal DSP, the digital wiring starts with the SMD exit patterns.Use the shortest and widest printed lines allowed by assembly processes.For high frequency devices, the printed line of power is equivalent to a small inductance, which will aggravate the power noise and create an undesired coupling between analog and digital circuits.The longer the power printed line, the greater the inductance.

The optimal layout and wiring scheme can be obtained by using digital bypass capacitance.In short, adjust the position of the by-pass capacitance as needed to make it easy to install and distribute around the digital part of the digital part and the digital part of the mixed signal device.The same "shortest and widest routing" method is used to route the bypass capacitance circuit.

When the power branch passes through a continuous plane (e.g., the 3.3v power layer on the OC48 interface card), the power pins and the by-pass capacitors themselves do not have to share the same outlet diagram to get the lowest inductance and ESR by-pass.On a hybrid signal PCB such as the OC48 interface card, special attention should be paid to the wiring of the power branch.Remember to place additional by-pass capacitance across the card in a matrix arrangement, even near the passive device.

After the power outlet diagram is determined, automatic wiring can be started.ATE test contacts on OC48 CARDS are defined at logical design time.Make sure the ATE touches 100% of the nodes.In order to perform the ATE test with the 0.070-inch minimum ATE test probe, the location of the breakout via must be preserved so that the power layer is not separated by the cross-section of the reverse pad (antipads).

If a split scheme is to be adopted, a layer bias should be selected on the adjacent wiring layer parallel to the opening.The perimeter of the open area is defined on the adjacent layer to prohibit the cabling area and prevent the cabling from entering.If the wiring must pass through the opening area to another layer, make sure that the other layer adjacent to the wiring is continuous.This will reduce the reflection path.Bridging the gap between the digital and analog power layers is not recommended because noise is coupled via the by-pass capacitance.

Several of the latest automated wiring applications are capable of wiring high-density multi-layer digital circuits.In the initial wiring stage, a large 0.050-inch hole spacing should be used in the SMD outlet and the type of package used should be considered. In the subsequent wiring stage, the positions of the holes should be allowed to be close to each other, so that all tools can achieve the highest penetration rate and the lowest number of holes.Since the OC48 processor bus USES an improved star topology, it has the highest priority when automatically wiring.


After completing the OC48 card board, signal integrity verification and timing simulation will be conducted.Simulation results show that the wiring guidance meets the expected requirements and improves the timing index of the second layer bus.The final inspection of the design rules, the final manufacturing review, the light cover and the review are issued to the manufacturer, and the board task officially ends.